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VHDL “Digital Lock” design implemtntation on Altera DE2 board and Area and Time optimization of ASIC “FIFO” design using Synopsys design compiler
VHDL design of LCD display integrated circuit the design optimization tool
2014/12/31
Part 1: In this the main objective of the project was to produce a VHDL design which can be programmed on Altera DE2 board. This project gives an overview of how different components of DE2 board can ...
Design and Evaluation of an L-Band Current-Mode Class-D Power Amplifier Integrated Circuit
power amplifier mixer integrated circuit model efficiency
2014/12/8
Power amplifiers (PAs) convert energy from DC to high frequencies in all radio and microwave transmitter systems be they wireless base stations, handsets, radars, heaters, and so on. PAs are the domin...
VLSI-cell placement technique for Architecture of Field Programmable Gate Array (FPGA) design
Field Programmable Gate Array (FPGA) Space Vector Pulse Width Modulation (SVPWM) Configurable Logic Blocks (CLBs)
2010/1/11
The Field Programmable Gate Array (FPGA) is an on field programmable device which can be designed for different applications. Various types of software are available for its synthesis. The cell placem...
Design of Low Noise SIPC LC-QVCO for IEEE 802.11a Application in 0.18μm CMOS Technology
LC-QVCO phase noise RF CMOS SIPC-QVCO
2010/2/2
This paper presents the design of a source injection
parallel coupled (SIPC) quadrature voltage controlled oscillator
(QVCO), realized in both −gm pMOS cross coupled switching stage
and m ...
Low Power Design of Digital Combinatorial Circuits with Complementary CMOS Logic
Boolean function combinational logic synthesis low power design
2010/2/2
The increasing demand for low-power design can be
addressed at different design levels, such as software, architectural,
algorithmic, circuit, and process technology level [3]. This paper
presents ...